Methods for producing hybrid semiconductor structures having a support plate structure on which a semiconductor chip is located are already known from U.S. Pat. No. 3,292,240 and from U.S. Pat. No. 3,303,393. The connection of a semiconductor substrate on a support plate substrate is formed by spherical metal contacts, which are soldered with the use of lead-tin soft solder to the chip connector spots of the semiconductor chip substrate on the one side and to the associated support connector spots of the support plate substrate on the other.
In accordance with U.S. Pat. No. 3,517,279, a further embodiment of this known method of the co-called flip-chip technology consists in that the metal spheres are omitted and that a soft solder layer is applied to the chip connector spots and/or the support connector spots and the semiconductor structure is soldered with the aid of this soft solder layer alone in accordance with the reflow soldering method.
It is furthermore known from DE-AS 16 14 374 to apply a passivation layer to a least a portion of the surface of a semiconductor chip substrate provided with metallic connector spots.
A disadvantage of the known method of the flip-chip technology lies in that it is difficult to apply the soft solder to the chip connector spots and/or the support connector spots in a suitable amount, as well to retain it there during melting, with which a reliable mechanical and electrically conductive connection between the respective connector spots is achieved on the one hand and, on the other, short-circuiting of adjacent connector spots is prevented. A further disadvantage consists in that with semiconductor chip or semiconductor wafer substrates with large surfaces the hybrid semiconductor structure is subjected to shear loads on account of the different thermal expansion of the two substrates.